The present invention relates in general to semiconductor devices, and more particularly to non-gated thyristor devices.
Silicon controlled rectifiers (SCRs) and triacs are part of the gated thyristor family that are fabricated as respective four-layer and five-layer devices that can function to control AC circuits, such as light controls, dimmer circuits, power pulse circuits, voltage references in AC power circuits, motor control circuits, etc. Many of these AC circuits are controlled by triggering the gated thyristor devices at desired phase angles of the AC voltage. Rather than triggering these gated thyristor devices directly from the AC power, such gated thyristor devices are more efficiently triggered by two-terminal thyristor devices, known sometimes as diacs, sidacs or silicon trigger switches (STS). Diacs and sidacs are commercially available from Teccor Electronics of Irving, Tex.
A conventional phase angle control circuit 10 used as a light dimmer is shown in FIG. 1a. An AC source 12 of power, such as 110 VAC, is coupled to a triac 14 which is in series with an incandescent light bulb 16. The triac 14 can be triggered into conduction at various magnitudes of the AC voltage, e.g., at different phase angles, to thereby control the intensity of the light emitted by the light bulb 16. The triggering of the triac 14 to control the intensity of the light is carried out by the use of an RC network which includes a potentiometer 18 and a capacitor 20, together with a diac 22. The diac 22 has a negative resistance characteristic that makes it well suited for use in triggering gated thyristors. The breakover voltage (VB0) for many diacs used in 110 VAC applications is in the range of about 27-70 volts. The potentiometer 18 is adjustable for varying the intensity of the light emitted from the light bulb 16. As the resistance (that is in series with the capacitor 20) increases, there is an increased delay into each AC cycle before the diac 22 triggers the triac 14 into conduction. Once triggered into conduction, the triac 14 conducts AC current to the light bulb 16 for the remainder of the AC cycle. The shorter the duration of the AC cycle in which the triac 14 conducts, the dimmer the light becomes.
FIG. 1b illustrates a circuit configuration using sidacs 19a and 19b with respective telephone lines 21a and 21b to provide overvoltage protection thereto. Indeed, sidacs can be used to provide overvoltage protection functions, clamping functions and many other similar functions in numerous other types of circuits. Sidacs are available with breakover voltages in the range of about 6 volts to about 330 volts. The first sidac 19a is connected between ground and a telephone line tip conductor 21a to provide overvoltage protection thereto. Similarly, the second sidac 19b is connected between ground and the telephone line ring conductor 21b to provide overvoltage protection thereto. Various other configurations of sidacs and associated components can be coupled in a network between the telephone line conductors 21a and 21b to provide overvoltage protection functions. When a voltage carried by the telephone line conductor exceeds the breakover voltage of the sidac, the sidac is driven into conduction to thereby clamp the telephone line conductor to a low voltage level. A negative resistance characteristic of the sidac provides a low voltage drop across the two terminals thereof, thereby lowering the power developed by the sidac during conduction of the overvoltage energy.
The diac 22 and sidacs 19a and 19b are two-terminal thyristor devices that have a voltage/current characteristic generally shown in FIG. 2. When a voltage of a magnitude between the positive breakover voltage+VB0 and the negative breakover voltagexe2x88x92VB0 is applied across the two-terminal thyristor device, such device remains in a non-conductive state. The breakover voltage of a two-terminal thyristor can be exceeded by overvoltages, AC-derived signals, or many other types of signals. Once the breakover voltage is reached, the two-terminal thyristor device conducts and enters into its negative resistance region 26. Here, the voltage across the device is less than the breakover voltage. This feature can be used as an advantage in many applications.
The importance of the negative resistance region 26 is that the voltage across the two-terminal thyristor device decreases for increasing current through the device. The phenomenon of avalanche current flow through the two-terminal thyristor device causes the negative resistance characteristic 26. The power developed by the device is less, thus allowing the device to be made smaller in size. With a lower on-state voltage across the two-terminal device, a pulse of current can be provided to more efficiently trigger a triac or other device into conduction.
With conventional two-terminal thyristor devices, the voltage across the device typically decreases about two volts once it fully enters its negative resistance region 26. The dynamic resistance of the device in the negative resistance region 26 determines the extent by which the voltage across the two-terminal thyristor device decreases once the breakover voltage is exceeded. With a larger negative resistance, there is a larger difference in the voltage drop across the two-terminal thyristor device at breakover and after breakover.
In the light dimmer application of FIG. 1a, after the diac 22 enters the negative resistance region 26a or 26b, the sudden decrease in voltage across the diac 22 causes an additional voltage (about two volts) to be placed on the gate 24 of the triac 14. The diac circuit 23 thus produces a current pulse to quickly turn on the triac 14 so that the triac gate current does not languish through its turn-on transition. Less power is thus developed across the triac 14 itself. Once the triac 14 is driven into conduction by the diac circuit 23, the AC power for the remaining portion of the AC cycle drives the light bulb 16. Once the AC voltage passes through a zero crossing and the holding current of the triac 14 is no longer sustained, the triac 14 stops conducting current and remains in an off-state until triggered again in the next AC cycle by the current pulse from the diac circuit 23.
The design considerations of a diac, sidac or STS generally require that they be full wave, i.e., bidirectional devices, so that operation occurs during both the positive and negative cycles of the AC voltage. Moreover, the voltage/current characteristics should be symmetrical for both positive and negative trigger currents. This means that the positive and negative breakover voltages should be substantially the same magnitude. While more difficult to achieve, the break back or negative resistance characteristic 26 should exhibit a low dynamic resistance characteristic to provide a correspondingly larger current pulse to the gated thyristor to be triggered. When utilized for clamping functions, the negative resistance characteristic of the two-terminal thyristor device reduces the voltage across the device during conduction, thereby reducing the power dissipation requirements of the device.
A two-terminal thyristor device constructed according to the prior art is shown in FIG. 3. Two-terminal thyristor devices are generally three-layer devices, including a p-type midregion 30 and heavily doped n-type regions 32 and 34 diffused into opposite sides of a semiconductor wafer 36. The concentration of the n-type impurities is related to the magnitude of the breakover voltage of the two-terminal thyristor device. The wafer 36 is masked, and then etched through the top and bottom n-type regions 32 and 34, down into the p-type midregion 30. The mask defines the boundaries of each chip of the wafer 36. The etching process thins the wafer 36 around each chip. Two of the many chips formed on the wafer 36 are shown in FIG. 3. The thinned regions 38 that circumscribe each chip of the wafer 36 are then filled with a standard passivation glass to form a protective layer around each chip of the wafer 36. As can be appreciated, the beginning thickness of the wafer 36 and the amount to which it is thinned around each chip, determines how much flexing the wafer 36 can withstand before the semiconductor material breaks. Six-inch diameter wafers are more easily broken than a smaller diameter wafers of the same thickness. Because many more chips can be formed on a six-inch wafer than on a smaller diameter wafer, a broken six-inch wafer presents a much larger negative impact on production.
As noted above, two-terminal thyristor devices are constructed to exhibit a negative resistance characteristic after the breakover voltage has been exceeded. The extent of the negative resistance characteristic is a function of the thickness of the midregion 30. With a thinner midregion 30, the dynamic resistance of the negative resistance characteristic is reduced, thereby providing a greater difference in the voltage drop across the two-terminal thyristor device before conduction and after breakover has been achieved. It is apparent that devices with thinner midregions 30 are more desirable, as the current pulse delivered to gated thyristors provides more electrical energy to trigger the gated thyristors into conduction. In other applications, the negative resistance characteristic reduces the voltage across the two-terminal, thereby allowing the device to either carry more current, or be made smaller.
The midregion 30 of the two-terminal thyristor wafers 36 can be thinned either by starting with a thinner wafer 36, or by lapping the wafer 36 for mechanically removing the semiconductor material. However, in order to maintain a low incidence of breakage for thin wafers 36 due to handling, the wafer diameter must be small. This is a distinct disadvantage, as more wafers must be processed in order to produce a given number of chips, as compared to the use of larger-diameter wafers. As an alternative, the n-type regions 32 and 34 can be diffused further into the midregion 30 to effectively reduce the thickness of the midregion 30. This alternative requires more processing time during the diffusion and drive steps, and it is more difficult to control the effective thickness of the midregion 30 and thus control the dynamic resistance of the negative resistance characteristic.
In fabricating low breakover voltage devices by deep diffusion techniques, such process often becomes counterproductive as the deeper the diffused dopants are driven into the chip, the resulting junction breakover voltages increase. This is because the dopant concentration resulting from the diffusion process decreases as a function of the distance from the surface of the chip. With lower dopant concentrations, the breakover voltages increase.
From the foregoing, it would be commercially advantageous to be able to make two-terminal thyristor devices with thin midregions and well-defined avalanche capabilities, while using large diameter wafers.
In accordance with the principles and concepts of the invention, disclosed is a semiconductor device formed with one or more epitaxial layers to accurately control the impurity concentration therein and the thickness of the layer(s), thereby achieving low breakover voltages together with negative resistance characteristics. The utilization of one or more epitaxial layers formed on a thick semiconductor substrate allows larger-diameter wafers to be used to fabricate a correspondingly larger number of chips per wafer.
In accordance with one embodiment of the invention, disclosed is a two-terminal thyristor device having at least one thin epitaxial layer formed on a semiconductor substrate to provide an avalanche breakdown function and thus provide negative resistance characteristics. A semiconductor layer of material is formed over the epitaxial layer. These three semiconductor layers can be formed to provide a diac, a sidac, STS, or other thyristor device having a low avalanche breakdown voltage. The middle layer of the device is preferably a thin epitaxial layer having a non-uniform gradient of a first dopant type. The top semiconductor layer and the substrate are doped with substantially equal concentrations of the same type of a second dopant type to provide substantially equal positive and negative breakover voltages. As an alternative, the top semiconductor layer can also be formed by epitaxial methods.
In accordance with another feature of the invention, the thin middle epitaxial layer enables the device to exhibit a low dynamic negative resistance characteristic, without having to compromise the thickness of the substrate and thus the mechanical strength of the wafer.
In accordance with another aspect of the invention, only three semiconductor layers are necessary, including the substrate itself, in order to efficiently provide a low breakover voltage device and with negative resistance characteristics.
In accordance with yet another feature of the invention, a two-terminal thyristor device can be efficiently fabricated to function as a negative resistance device for triggering AC circuits, or providing overvoltage protection functions.
In accordance with another important feature of the invention, a bidirectional thyristor device is disclosed, with substantially equal-size top and bottom metal contacts. This provides a more symmetrical breakover voltage of both pn junctions, irrespective of the rise times of the voltages applied across the semiconductor device.
In accordance with yet another feature of the invention, three epitaxial layers can be used to provide two pn junctions having symmetrical breakover voltage characteristics. In this embodiment, the type of semiconductor substrate used is less critical.
In accordance with one embodiment, disclosed is a semiconductor device including a semiconductor material doped with an impurity of a first polarity, and an epitaxial layer formed on the semiconductor material. The epitaxial layer is doped with an impurity of a second polarity that is opposite the first polarity of the semiconductor material. The epitaxial layer has a thickness sufficient to provide avalanche breakdown. A semiconductor layer is then formed on the epitaxial layer, where the semiconductor layer is doped with an impurity of the same polarity as the semiconductor material. A first junction is formed between the semiconductor material and the epitaxial layer, and a second junction formed between the epitaxial layer and the semiconductor layer.
According to another embodiment, disclosed is a semiconductor device which includes a semiconductor material, and a first epitaxial layer formed on the semiconductor material, where the first epitaxial layer has a thickness suitable for providing avalanche breakdown thereof. A first pn junction is formed at an interface between the semiconductor material and the first epitaxial layer. The first pn junction is formed to provide a given breakdown voltage. A second epitaxial layer is formed on the first epitaxial layer. A second pn junction is formed at an interface between the first epitaxial layer and the second epitaxial layer. The second pn junction is formed to also provide a breakdown voltage substantially equal to the given breakdown voltage. A first metallic contact is formed on a surface of the semiconductor material, and a first terminal is connected to the first metallic contact. A second metallic contact is formed on a surface of the second epitaxial layer, and a second terminal connected to the second metallic contact.
According to yet another embodiment, disclosed is a method of forming a semiconductor device. The method includes the steps of forming on a semiconductor material a first epitaxial layer so that a pn junction is formed therebetween. The first epitaxial layer and the semiconductor material are formed with opposite polarity dopants. The first epitaxial layer is formed with a thickness sufficient to provide negative resistance properties for the semiconductor device. A second epitaxial layer is formed on the first epitaxial layer so that a pn junction is formed therebetween. The second epitaxial layer is formed with a dopant polarity the same as that of the semiconductor material.
According to another embodiment of the invention, disclosed is a semiconductor device having at least three semiconductor layers for forming two pn junctions, two of the semiconductor layers being of one type dopant polarity and another semiconductor layer being of an opposite type dopant polarity. Material characteristics of the semiconductor layers are selected and arranged so as to exhibit substantially equal breakover voltages of the two pn junctions. As such, one pn junction is forward biased when a voltage of a given polarity is applied across the semiconductor device, and the other pn junction is forward biased when a voltage of an opposite polarity is applied across the semiconductor device. A first metal contact is formed on one side of said semiconductor device in electrical contact with one semiconductor layer. A second metal contact is formed on an opposite side of the semiconductor device in electrical contact with another semiconductor layer. The first and said second metal contacts are constructed with substantially the same size surface areas to provide symmetry of the breakdown voltages of the pn junctions.